1. Field of the Invention
The present invention relates to an organic light emitting diode (OLED) device, and more particularly, to a driving circuit of an OLED device and a method for driving the same, in which image data is processed by Frame Rate Control (FRC) and dithering, so that it is possible to decrease data processing capacity, area of drive IC, and power consumption.
2. Discussion of the Related Art
In general, a cathode ray tube (CRT), which is one type of flat display devices, has been widely used for monitors of a television, a measuring apparatus, and an information terminal. However, the CRT cannot satisfy the demands for compact size and lightweight due to the size and weight of the CRT itself. Thus, various display devices, for example, a liquid crystal display (LCD) device using electric field optical effect, a plasma display panel (PDP) using a gas discharge, a field emission display device, and an electroluminescence display (ELD) device using an electric field luminous effect, have been studied to substitute the CRT.
Among the various display devices, the ELD device is a display device of using electroluminescence (EL) phenomenon, wherein the EL phenomenon indicates the state of generating light when an electric field above a predetermined level is applied to a fluorescent substance. The ELD device is classified into an inorganic electroluminescence display device and an organic electroluminescence display (OELD) device.
The OELD device has attracted great attention as a high-picture quality device since the OELD device displays all colors of visible rays. Also, the OELD device realizes high luminance using a low driving voltage. In addition, the OELD device emits light in itself, whereby the OELD device has great contrast ratio, and the OELD device is suitable for realizing an ultra-thin display device. Also, since the OELD device has a simplified fabrication process, it may generate less environmental pollution. In the meantime, the OELD device has a rapid response time of several microseconds, whereby the OELD device is useful to obtain moving picture images. Furthermore, the OELD device has no limit to a viewing angle, and the OELD device is stably operated at a low temperature. Also, the OELD device can be operated at a high voltage between 5V and 15V. As a result, the OELD device has the simplified fabrication process and the simple design.
The OELD device is very similar in structure to the inorganic ELD device. However, the OELD device generates light by recombination of electron and hole, whereby the OELD device is referred to as an organic light emitting diode (OLED).
The OELD device emits light in itself, so that the OELD device has wide viewing angle and high contrast, as compared with the LCD device. Also, since the OELD device does not require a separate backlight unit, the OELD device can realize thin profile and low power consumption. In addition, the OELD device is driven at a low D.C. voltage, and the OELD device has a rapid response speed. Also, the OELD device is formed of a solid material. As a result, the OELD device can endure external forces, and the OELD device can be driven in a wide range of temperature. Furthermore, the OELD device has the advantage of low fabrication cost.
Unlike the LCD device or the PDP device, when fabricating the OELD device, it only requires equipment for deposition and encapsulation, thereby realizing the simplified fabrication process.
Especially, if the OELD device is driven in an active matrix method of having a thin film transistor of a switching device in each pixel region, it is possible to realize low power consumption, high resolution, and large size in the OELD device, even though a low current is applied to the OELD device.
In case of the active matrix type, a plurality of pixel regions are formed in the matrix type, and a thin film transistor is connected to each pixel region. This active matrix type is generally used for the flat display device. Hereinafter, an active matrix organic light emitting display (AMOLED) device, in which the active matrix type is applied to the OLED, will be described with reference to the accompanying drawings.
FIG. 1 is a circuit diagram illustrating an OELD device according to the related art. As shown in FIG. 1, the OELD device according to the related art includes a gate line 1, a data line 2, a switching thin film transistor 4, a driving thin film transistor 5, a storage capacitor 6, and a light emitting diode 7. Although a single pixel unit is shown, it is known that the OELD device has a plurality of such pixel units in the matrix form.
At this time, a gate electrode of the switching thin film transistor 4 is connected with the gate line 1, and a source electrode is connected with the data line 2. Also, a drain electrode of the switching thin film transistor 4 is connected with a gate electrode of the driving thin film transistor 5, and a drain electrode of the driving thin film transistor 5 is connected with an anode electrode of the light emitting diode 7. Also, a source electrode of the driving thin film transistor 5 is connected with a power line 3, and a cathode electrode of the light emitting diode 7 is grounded. Next, the storage capacitor 6 is connected with the gate and source electrodes of the driving thin film transistor 5.
Accordingly, if a gate signal is applied through the gate line 1, the switching thin film transistor 4 is turned on. Then, as a data signal of the data line 2 is transmitted to the gate electrode of the driving thin film transistor 5 through the switching thin film transistor 4, the driving thin film transistor 5 is turned on, whereby light is emitted from the light-emitting diode 7. At this time, when the switching thin film transistor 4 is turned off, the storage capacitor 6 stably maintains the gate voltage of the driving thin film transistor 5.
FIG. 2 is a cross sectional view illustrating the driving thin film transistor and the light emitting diode of FIG. 1.
FIG. 2 illustrates the related art OLED device. Referring to FIG. 2, a buffer layer 11 of an insulating material, for example, silicon oxide SiO2 is formed on the entire surface of a substrate 10. Also, island-shaped polysilicon layers 21, 22 and 23 are formed on predetermined portions of the buffer layer 11. At this time, the polysilicon layers 21, 22 and 23 are divided into an active layer 21, and source and drain regions 22 and 23, wherein the active layer 21 of the thin film transistor is not doped with impurity ions, and the source and drain regions 22 and 23 are doped with impurity ions. At this time, the polysilicon layers 21, 22 and 23 are formed in a method of crystallizing an amorphous silicon layer.
Then, a gate insulating layer 30 is formed on the polysilicon layers 21, 22 and 23, wherein the polysilicon layers 21, 22 and 23 are divided into the active layer 21 of the thin film transistor, and the source and drain regions 22 and 23 doped with the impurity ions. The gate insulating layer 30 is formed on the entire surface of the buffer layer 11 including the polysilicon layers 21, 22 and 23. Subsequently, a gate electrode 42 is formed on the gate insulating layer 30 above the active layer 21.
Then, an insulating interlayer 50 is formed on the gate insulating layer 30 including the gate electrode 42, wherein the insulating layer 50 has first and second contact holes 50a and 50b for exposing predetermined portions of the source and drain regions 22 and 23 of the polysilicon layers. At this time, the insulating interlayer 50 is formed of a dual-layered structure having first and second insulating interlayers 51 and 52.
Next, a source electrode 62 and a drain electrode 63 are formed on predetermined portions of the insulating interlayer 50 and in the first and second contact holes 50a and 50b, wherein the source and drain electrodes 62 and 63 are formed of a conductive material such as metal. At this time, the source and drain electrodes 62 and 63 are respectively connected with the source and drain regions 22 and 23 of the polysilicon layers through the first and second contact holes 50a and 50b. 
After that, a passivation layer 70 is formed on the entire surface of the insulating interlayer 50 and the source and drain electrodes 62 and 63. At this time, the passivation layer 70 has a third contact hole 71 for exposing the drain electrode 63 in the second contact hole 50b. 
Then, a pixel electrode 81 is formed on predetermined portions of the passivation layer 70 and in the third contact hole 71, wherein the pixel electrode 81 contacts the drain electrode 63 through the third contact hole 71. At this time, the pixel electrode 81 is formed of a transparent conductive material. Also, the pixel electrode 81 serves as the anode electrode of the light emitting diode.
In the OLED device according to the related art, a drive IC for applying the data signal to the data line has linear output characteristics. Thus, in order to perform gamma correction, inputted data having a predetermined bit number is converted so that the converted data has a larger bit number than the predetermined bit number of the inputted data. As the bit number of data increases, the drive IC increases in size and power consumption.
FIG. 3 is a block diagram illustrating the related art OLED device. FIG. 4 is a graph illustrating the luminance characteristics by gray level before and after the gamma correction of FIG. 3.
As shown in FIG. 3 and FIG. 4, a driving circuit of the related art OLED device includes a gate drive unit 103, a data drive unit 105, and a timing controller 110. At this time, the gate drive unit 103 and the data drive unit 105 respectively apply driving signals to gate and data lines formed on a panel 100. The panel 100 includes a plurality of pixel units of FIGS. 1 and 2 as discussed above. Also, the timing controller 110 controls the gate drive unit 103 and the data drive unit 105.
The timing controller 110 receives RGB image data of n-bit and synchronized signals HSYNC and VSYNC for displaying the corresponding RGB image data from a graphic source (not shown) of a system. Then, the timing controller 110 performs gamma correction and color compensation on the RGB image data, and outputs the compensated RGB data of m-bit to the data drive unit 105.
In the meantime, the timing controller 110 further includes a data convert unit 111 for converting the gamma characteristic of RGB image data to a gamma 2.2 curve.
The data convert unit 111 receives the RGB image data of n-bit, and converts the gamma characteristics of the received original RGB image data to the gamma 2.2 curve shown in FIG. 4. Then, the data convert unit 111 outputs the RGB image data of m-bit having the converted gamma characteristics. At this time, the data convert unit 111 performs the conversion of the gamma characteristics by LUT (Look-Up Table) or arithmetic of a numerical formula. For any pixel, the bit number of the RGB image data having the converted gamma characteristics is always larger by two than the bit number of the original RGB data.
FIG. 4 illustrates the gamma curve of the original RGB image data in comparison with the gamma 2.2 curve showing essential factors of the gamma characteristic in RGB color area. In FIG. 4, the horizontal axis shows the gray level wherein a maximum value of the input RGB image is set to ‘1’, and the vertical axis shows the luminance level wherein a maximum value to the corresponding gray level is set to ‘1’. To satisfy the essential factors of the RGB color area, it is necessary to convert the gamma characteristics of the RGB data according to the gamma 2.2 curve.
However, the related art OLED device has the following disadvantages.
In case of the related art OLED device, in order to perform the gamma correction, the inputted data having the predetermined bit number is converted so that the converted data has a bit number larger (by two) than the predetermined bit number of the inputted data. In this state, the converted data is transmitted to the drive IC (data drive unit 105). That is, the data inputted to the timing controller has n-bit, and the data transmitted to the drive IC has m-bit, wherein m=n+2.
In this case, when the drive IC processes the data, the bit number of data is increased to m-bit, whereby the size of the drive IC and the power consumption increase.